
Configuring the UDC Module’s Registers
3-61
3.8 Interrupt Status and Control Registers (Registers
2000-2047)
This view is used to configure registers that control the operation of interrupts to a task
on an AutoMax Processor in the rack and to enable CCLK in the rack. These
registers are used for Drive A and B. Only one UDC task should write to these
registers. Note that the status of these registers is not retained after a Stop All.
Interrupt Status Control Register 2000
The Interrupt Status Control register contains the following
information. Only bit 6 can be written to by the user. All other bits
are read only.
Sug. Var. Name: UDC_ISCR%
Units: N/A
Range: N/A
Access: See individual
bits
Interrupt Line Identification Bit 0
Hex Value: 0001H
Sug. Var. Name: N/A
Access: Read only
UDC Error Code: N/A
LED: N/A
Interrupt Line Identification Bit 1
Hex Value: 0002H
Sug. Var. Name: N/A
Access: Read only
UDC Error Code: N/A
LED: N/A
Interrupt Allocated Bit 2
Hex Value: 0004H
Sug. Var. Name: N/A
Access: Read only
UDC Error Code: N/A
LED: N/A
Interrupt Generated This Scan Bit 4
Hex Value: 0010H
Sug. Var. Name: N/A
Access: Read only
UDC Error Code: N/A
LED: N/A
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