
Configuring the UDC Module’s Registers
3-13
PMI Communication Status Register (Continued) 84/1084
Overrun Error Bit 3
The Overrun Error bit is set if the USC
reports a receive first-in, first-out overrun.
Hex Value: 0008H
Sug. Var. Name: N/A
Access: Read only
UDC Error Code: N/A
LED: N/A
DMA Format Error Bit 4
The DMA Format Error bit is set if the length
of the received message does not match the
length encoded in the message itself.
Hex Value: 0010H
Sug. Var. Name: N/A
Access: Read only
UDC Error Code: N/A
LED: N/A
Transmitter Underrun Bit 5
The Transmitter Underrun bit is set if the
USC reports a transmit first-in, first-out
underrun.
Hex Value: 0020H
Sug. Var. Name: N/A
Access: Read only
UDC Error Code: N/A
LED: N/A
CCLK Communication Synchronization Error Bit 6
The CCLK Communication Synchronization
Error bit is set if two or more CCLK counter
ticks occur and no message is received.
Hex Value: 0040H
Sug. Var. Name: N/A
Access: Read only
Sug. Var. Name: VDC_RUN@
UDC Error Code: N/A
LED: N/A
UDC CCLK Communication Synchronization Error Bit 8
The UDC CCLK Communication
Synchronization Error bit is set if two UDC
CCLK counter ticks occur and no message
is received from the PMI.
Hex Value: 0100H
Sug. Var. Name: N/A
Access: Read only
UDC Error Code: N/A
LED: N/A
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