
4Ć2
register 2
R RRRRRRR RR Ć Ć ĆRRR
0123456789101112131415
RW R R RW R R R R RW RW Ć Ć Ć RW RW RW
register 3
bits
Interrupt line ID
ăăă Interrupt allocated
ăăăăInterrupt clock enable
ăăăăInterrupt enabled
Module fault
ăResolver not connectedă
ăăăăăCommon clock off
Isolated power fault
External strobe reset
Position angle increasing
External strobe status
Interrupt flag status
Figure 4.2 Ć Interrupt Control Registers
Register 4 contains the update period for reading the resolver
position. Each count in this register is equivalent to 500
microseconds. The update period may range from 500 microseconds
to 32.7675 seconds. Refer to figure 4.3.
register 4
0123456789101112131415
update period
bits
Figure 4.3 Ć Resolver Update Register
4.2 Local I/O Definition
Before any application program can be written, it is necessary to
configure, or set, the definitions of systemĆwide variables, i.e. those
that must be globally accessible to all tasks. This section describes
how to configure the input module when it is located in the same rack
as the processor module that is referencing it. Refer to figure 4.4.
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